Various semiconductor constructions comprise an insulative cap stacked over a conductive material. For instance, wordlines and bitlines typically comprise conductive materials patterned as lines extending across a semiconductor substrate, and protected by electrically insulative caps formed over the electrically conductive lines.
It is frequently desired to form openings extending through the protective cap to the conductive material beneath the cap. For instance, it can be desired to form an electrical interconnect extending to the electrically conductive material of a wordline or bitline. This is commonly accomplished by forming an opening extending through an electrically insulative protective cap to expose electrically conductive material of the wordline or bitline, and subsequently filling the opening with an electrically conductive material to form the electrical interconnect to the conductive material of the wordline or bitline.
A prior art process for forming an electrical interconnect to conductive material of a line is described with reference to FIGS. 1 and 2. Referring initially to FIG. 1, a semiconductor construction 10 includes a substrate 12 having an upper surface 14. Substrate 12 can comprise, for example, monocrystalline silicon lightly-doped with background p-type dopant. To aid in interpretation of the claims that follow, the terms “semiconductive substrate” and “semiconductor substrate” are defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
A thin layer of electrically insulative material 16 is formed over upper surface 14, and an electrically conductive line 18 is formed over insulative material 16. Insulative material 16 can comprise, for example, silicon dioxide. The electrically conductive material of line 18 can comprise, for example, one or more materials selected from the group of metals, metal compounds and conductively-doped silicon. Although line 18 is shown having a homogeneous cross section, it is to be understood that the line can comprise a stack of one or more electrically conductive layers of differing composition relative to one another. Line 18 would have a length extending into and out of the page relative to the FIG. 1 cross-sectional view.
A protective material 20 is formed around electrically conductive line 18. Protective material 20 is typically an electrically insulative material, and can comprise, consist essentially of, or consist of silicon nitride. A stack 22 can be considered to comprise protective material 20, line 18 and insulative material 16. The protective material 20 can extend around three sides of conductive material 18 in the stack (as shown), br, in other aspects (not shown) can be only over the top of material 18.
A thick mass of electrically insulative material 24 is formed over stack 22, as well as over surface 14 of substrate 12. Mass 24 can comprise, for example, a silicate glass (such as, for example, borophosphosilicate glass (BPSG)). Mass 24 can be homogeneous, or can comprise a stack of electrically insulative materials. Mass 24 will typically comprise a thickness over stack 22 of at least about 10,000 Å, frequently at least about 15,000 Å, and even at least about 20,000 Å.
A patterned masking material 26 is formed over mass 24. Masking material 26 can comprise, for example, photoresist, and can be patterned utilizing photolithographic processing. Patterned masking material 26 defines an opening 28 extending through the patterned masking material and to an upper surface of mass 24.
Referring to FIG. 2, opening 28 is extended through mass 24, through protective material 20, and to an upper surface of conductive material 18, utilizing a suitable etch. If mass 24 consists of a silicate glass, and protective material 20 consists of silicon nitride, a suitable etch for forming opening 28 can be an etch utilizing CF4.
A problem which occurs during formation of opening 28 is that even though etches are known which can etch both a silicate glass of mass 24 and a silicon nitride material of protective layer 20, the etches will frequently be slower relative to a silicon nitride material than to a silicate glass. Accordingly, the downward progression of the etch slows once the etch reaches protective material 20. The etch can then start to extend laterally outward which forms a widened region 30 of opening 28.
A continuing goal of semiconductor processing is to reduce dimensions associated with circuit components to enable an increase in packing density of the components. Ultimately, a conductive interconnect is to be formed in opening 28, and the widening of opening 28 confers an increased lateral dimension to the electrical interconnect. Such increased lateral dimension reduces a packing density that can be achieved. Accordingly, it is desired to develop new methods for forming openings which alleviate or prevent the widening associated with prior art processes.